the EPP data transmission mode

[w410565]

Dear Jan,
I am now using parallel port in a data acquisition system to acquire the data.And I had read the book,parallel port complete. Now I have some questions to ask,as follow:
1、In the EPP data transmission mode,how can I double the speed of the data transmission(1.33MB/S---2.67MB/S)? In the book ,it needs the signal of /nows, but where is it and how to use it?
2、In EPP data transmission mode,the parallel have two modes to acquire the data.One needs handshake signals（&H378+4）,another needs not（&H378）. what's difference of C5(bits 5 of the control register )using in the both mode?（The mode which does not need handshake signals needs to set up the level of C5,but another ,I donot know.）
3、In my design, I use the winio library to write/read data in VB6.0. Does the task of detecting the signal of 'nWait' implement by software in VB or hardware of the parallel,when the data transmit from Peripherals to PC?

thank you !

[Jan Axelson]

The data rate will be slow if you're using port reads and writes from an application. For high speed you need to use a low-level driver.

Epp mode (base address + 4 ) uses built in hardware handshaking. In spp/ps/2 mode (base address), software typically does the handshaking.

[w410565]

In EPP and ECP modes, the port’s hardware takes care of the handshaking automatically,within a single read or write operation. When the PC and peripheral
both support one of these modes, you can transfer data at the speed of port writes on the ISA bus, typically 1.3 Mbytes/sec, or 2.7 Mbytes/sec with the shortened cycles.
For faster access, there is a shortened, or zero-wait-state memory-access cycle achieved by eliminating three of the wait states on the bus. This occurs if the port circuits bring NOWS (no wait states) on the ISA bus low during T2. The data to be read or written must be available by the end of T2. This doubles the speed of port accesses, to 2.67 Megabytes per second on an 8-Mhz bus.

These two pieces of information I read in your book,parallel port complete.
Now,I want to know what measures do I take to use the zero-wait-state memory-access cycle to double the speed of port accesses.



[attachment deleted by admin]

[Jan Axelson]

NOWS is an ISA-bus signal, and ISA is pretty much obsolete.

[w410565]

"Some Data ports are bidirectional. (See Control register, bit 5 below.)"
“Direction control for bidirectional Data ports. 0=outputs enabled. 1=outputs disabled; Data port
can read external logic voltages.”

In epp mode (base address + 4 ),How to handle the bit 5（C5） in the control register?
Do I need to use the software to set the value of C5 in this mode,when I read/write data?

Thanks!

[Jan Axelson]

For EPP transfers, the host and peripheral use the EPP protocols to switch directions.