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REGARDING THE DETECTION OF LFPS

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KOTTA:
Hi USB'ians,

Could kindly clarify me regarding the LFPS...

LFPS means on the bus signalling occurs at low frequencies or otherwise still signalling happens at 5GHZ.
When ever link partner encounters LFPS on the bus, will the "bit clock" will be other than 5GHZ or 50 to 100 MHZ (which is the LFPS signalling frequency).
How basically link partner differentiates Data and LFPS???
The reason for the above questions is "I was using ROCKET I /O which is part of vertex 5 and would like to develop LFPS detection logic by creating wrapper", I was able to achieve the transmission of LFPS but unable to develop LFPS detection.

Regards,
Sreedhar....

Jan Axelson:
I would think that LFPS uses such different signaling in part to make it easy to distinguish it from data. (It's also easy to generate and uses little power, according to the spec.) I don't know the mechanism used to detect it.

Table 6-20 in the USB spec. gives the period as 20 -100 ns, which works out to 10-50 Mhz.

Jan

KOTTA:
Thanks Jan,

Bu the catch here is "If signaling do occur with in 10 - 50 Mhz on the bus, then definitely going by CDR mechanisms internal bit should be with in 10 - 50 Mhz right ???", what u suggest for this Jan....

Regards,
Sreedhar...

Jan Axelson:
As I understand it, the LFPS detector needs to detect the duration of bursts in the LFPS frequency range. I don't know what mechanism USB 3.0 components are using to accomplish this.

Jan

tim:
Hello,
I have two question?
 PHY is transmitting data, MAC is providing data bytes to be sent every clock cyce.
question 1: PHY is transmitting LFPS signaling, MAC or PHY is providing  LFPS?
question 2: PHY is transmitting TSEQ, TS1 and TS2 training Sequence, MAC or PHY is providing  training Sequence?

Regards

Tim

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