PORTS Forum
Ports and Interfaces => USB => Topic started by: chandu on August 04, 2014, 02:27:52 am
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Hi everyone,
I'm working on STM32F407 USB, My problem is when i am writing the SETUP packet in to Tx FIFO channel disable interrupt is raising and it calling to the channel ISR.
In the Channel ISR instead of the XFER completed interrupt TXERR interrrupt is invoking, why it is happening like this?
I don't understand this problem, i'm using the STM32CUBE FW_F4_V1.1.0, please can any one explain about this issue.
Thanks & Regards,
Chandu.Kurapati
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when i am writing the SETUP packet in to Tx FIFO channel
...
i'm using the STM32CUBE FW_F4_V1.1.0
Sound like you are hitting the OTG host directly, without using the library routine.
The host stack supposes that USBH_CtlReq() is applied to a control transfer, like this MSC Get_Max_LUN case,
\STM32Cube_FW_F4_V1.3.0\Middlewares\ST\STM32_USB_Host_Library\Class\MSC\Src\usbh_msc_bot.c
USBH_StatusTypeDef USBH_MSC_BOT_REQ_GetMaxLUN(USBH_HandleTypeDef *phost, uint8_t *Maxlun)
{
phost->Control.setup.b.bmRequestType = USB_D2H | USB_REQ_TYPE_CLASS | \
USB_REQ_RECIPIENT_INTERFACE;
phost->Control.setup.b.bRequest = USB_REQ_GET_MAX_LUN;
phost->Control.setup.b.wValue.w = 0;
phost->Control.setup.b.wIndex.w = 0;
phost->Control.setup.b.wLength.w = 1;
return USBH_CtlReq(phost, Maxlun , 1 );
}
Tsuneo
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Hi Tsuneo,
I'm requesting for the device descriptor like this,
/* Configure the bm request type in to setup packet */
p_stgUsbhStackObject->st_mControlReq.un_mSetupPacket.ST_PKT_t.u8_mBmReqType = \
( USB_REQ_TYPE_DIR_IN | u8_fReqType );
/* Configure the b request value in to setup packet */
p_stgUsbhStackObject->st_mControlReq.un_mSetupPacket.ST_PKT_t.u8_mBRequest = USBREQ_GET_DESCRIPTOR;
/* Configure the w value in to setup packet */
p_stgUsbhStackObject->st_mControlReq.un_mSetupPacket.ST_PKT_t.u16_mWValue = u16_fValueIdx;
/* Configure the w Index value in to setup packet */
if((u16_fValueIdx & 0xFF00) == USB_DESC_STRING)
{
p_stgUsbhStackObject->st_mControlReq.un_mSetupPacket.ST_PKT_t.u16_mWIndex = 0x0409;
}
else
{
p_stgUsbhStackObject->st_mControlReq.un_mSetupPacket.ST_PKT_t.u16_mWIndex = 0;
}
/* Configure the w Length value in to setup packet */
p_stgUsbhStackObject->st_mControlReq.un_mSetupPacket.ST_PKT_t.u16_mWLength = u16_fLength;
I'm filling this and then transmitting the setup packet into the Tx FIFO then after transmitting immediately channel is disabled and channel transaction error interrupt is raising, I don't understand why it is happening like this for my reference code every thing goes fine.
can you please explain me about this.
Thanks & Regards,
Chandu.Kurapati.
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I can tell nothing certain, based on such little information you provided.
To get valid clue, monitor the bus traffic using a hardware bus analyzer.
And then, you’ll get better interpretation of the TXERR (transaction error)
- The target device doesn’t respond at all (Transaction timeout)
or
- The target device has responded, but wrongly (CRC/bit stuff/EOP error in the transaction)
or
- Spurious error, caused by wrong setup of the channel (no transaction on the bus)
Tsuneo
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Hi every one,
Can any one please explain about the differential '1' and differential '0' state in USB. what is the 'J' and 'K' state and how they are very for the different speeds and what are the different states of bus lines in USB.
Thanks & Regards,
Chandu.Kurapati.
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In the USB 2.0 spec, see section 7.1.7. Let us know if you still have questions.
http://www.usb.org/developers/docs/usb20_docs/