Author Topic: what about using NAND Flash memory?  (Read 9671 times)

eng.Buffon

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what about using NAND Flash memory?
« on: March 16, 2012, 02:02:11 am »
hi guys

hi everyone

i had already implemented the Mass storage Class on Pic18f4550 with (SD-Card) as the storage element.

but now i wanna use Flash Memory for more Storage area.

so what is the NAND Flash Memory protocol ?

do i need to a controller for that flash memory ? or just i change the SPI protocol to the NAND Flash Memory protocol and keep everything the same??




Jan Axelson

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Re: what about using NAND Flash memory?
« Reply #1 on: March 16, 2012, 09:56:39 am »
The USB mass-storage class and SCSI protocols don't care what type of memory the storage device uses. The same drivers communicate with hard drives, flash drives, etc. The hardware interface is handled at a lower level.

Jan

Pat Crowe

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Re: what about using NAND Flash memory?
« Reply #2 on: March 17, 2012, 06:42:01 am »
Jan,

My recollection of NAND flash devices from my days of being involved with device programming was that they achieved their high density by accepting that a proportial of their sectors would exhibit errors. My understanding has always been that e.g. Windows assumes a set of numbered sectors which are guaranteed error free, so anyone implementing a NAND based MSD would have to establish a virtual sector space, below which an error managment system (designed by the implementer), transparent to the OS, would have to be in place.

I would be interested to know if this basic situation has changed in the intervening period.

tkafafi

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Re: what about using NAND Flash memory?
« Reply #3 on: March 19, 2012, 06:49:56 pm »
Hi,
I am by no means and expert, but I'll share what info I know about this.

The following article (http://www.anandtech.com/show/5067/understanding-tlc-nand ) gives a good overview of flash memory and how extra mangement (called wearleveling http://en.wikipedia.org/wiki/Wear_levelling) is needed to operate it reliably. As Pat indicated, flash memories can use multiple bits per cell to achieve higher densities but this also results in higher error rates. In such cases the wearleveling becomes very important . As Jan indicates the flash devices (usb flash drives, SSDs and SD cards ...) have an hardware controller chip that performes this management function so you don't have to worry about it in these cases. For example, in the following picture (http://en.wikipedia.org/wiki/File:Sd_insides.png) you can see the controller as the top chip inside the SD card and the bottom chip is the flash memory.

From the original post, it is not clear how the flash is used in the system. Are you plugging a usb flash drive ? Or are there actual NAND flash chips on the board connected through an SPI hardware bus?

If it is a usb flash drive, then the controller will take care of it and as Jan said, you don't need to worry about it.

If it is NAND chips on an SPI bus without a controller then it seems to me you need to manage these issues. First,  if you are communicating over SPI, not USB, I don't think the class drivers come into the picture and you need to read the flash chips data sheets to write firmware to operate them. Second, reading the flash does not cause any deterioration, its only the write cycles that result in detorioration. So if the target usecase is to store bootup code then probably wearleveling is not needed since it is expected that the flash would be programmed only a few times for FW updates and most of the time are just in read mode. But if you will perform many writes you need to perform wearleveling. In this case it may be simpler to get a comercial file system targeted for flash rather that codingall this your self. For e.g look at TrueFFS (http://www.eettaiwan.com/STATIC/PDF/200808/EETOL_2008IIC_Spansion_AN_13.pdf ). 

Hope this was helpfull.

Thanks
Tamer